Add memory INC/DEC

Also refactor verification

src/decoder.verilog

@@ -175,11 +175,11 @@ always_comb begin
                 address_code = ADDR_MODE_IMPLIED;
             end
             else if (column == 3) begin
-                if (row == 2) begin
-                    address_code = ADDR_MODE_ABSOLUTE;
+                if (row == 3) begin
+                    address_code = ADDR_MODE_INDIRECT;
                 end
                 else begin
-                    address_code = ADDR_MODE_INDIRECT;
+                    address_code = ADDR_MODE_ABSOLUTE;
                 end
             end
             else if (column == 4) begin
@@ -293,6 +293,41 @@ always_comb
         assert (address_code == ADDR_MODE_IMMEDIATE);
     end;
 
+always_comb
+  if (instr == 8'hA0) // LDY imm
+    begin
+        assert (decoded == I_LDY);
+        assert (address_code == ADDR_MODE_IMMEDIATE);
+    end;
+
+always_comb
+  if (instr == 8'hA4) // LDY zp
+    begin
+        assert (decoded == I_LDY);
+        assert (address_code == ADDR_MODE_ZP);
+    end;
+
+always_comb
+  if (instr == 8'hB4) // LDY zp,X
+    begin
+        assert (decoded == I_LDY);
+        assert (address_code == ADDR_MODE_INDEXED_ZP);
+    end;
+
+always_comb
+  if (instr == 8'hAC) // LDY abs
+    begin
+        assert (decoded == I_LDY);
+        assert (address_code == ADDR_MODE_ABSOLUTE);
+    end;
+
+always_comb
+  if (instr == 8'hBC) // LDY abs,X
+    begin
+        assert (decoded == I_LDY);
+        assert (address_code == ADDR_MODE_INDEXED_ABSOLUTE_X);
+    end;
+
 always_comb
   if (instr == 8'hCA) // DEX
     begin
@@ -300,6 +335,11 @@ always_comb
         assert (address_code == ADDR_MODE_IMPLIED);
     end;
 
+always_comb
+  if (instr == 8'hE0) // CPX
+    begin
+        assert (decoded == I_CPX);
+    end;
 always_comb
   if (instr == 8'hE0) // CPX
     begin